Introduction to QCPU 2
An introduction into the QCPU 2 architecture and its assembly language.
QCPU 2 is a singular operand architecture, which means its instructions can be 8 bits in size. Its address space, however, is 16 bits.
1 Register map
- Accumulator:
ra(0) - Zero register:
zr(0) - General purpose:
rb,rc,rd,re(1-4) - Subroutine args:
rx,ry,rz(5-7)
1.1 Special registers
There are a couple of special, non-addressable registers:
- Stack pointer:
sp(u16) - Stack frame pointer:
sf(u16)
1.2 Index register
Certain memory operations can use registers rx and ry as the 16 bit index register, as opposed to either one of the special registers or none. See the memory chapter for more information about memory accessing and data flow.